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Crystal defects in SiC wafers and a new X-ray topography system

Winter 2013, Volume 29, No. 1
01-08
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Kazuhiko Omo

High-voltage and high-efficiency power devices are in strong demand as a way of decreasing energy consumption in a wide range of industrial and consumer products. Wide band gap semiconductors such as SiC, GaN, and diamond are candidates for producing these next generation power devices. Table 1 indicates the basic physical properties for these materials compared to Si. These materials have a much higher breakdown voltage and are expected to be used in future equipment requiring compact and low-loss conversion devices.  Among these materials, SiC is the most promising candidate and is expected to be used in a wide range of power device applications in the near future.

The band gap of SiC is approximately three times greater than Si and has a breakdown electric field strength nearly 10 times higher than Si as shown in Table 1. These characteristics result from the extremely strong atomic bonds in the crystal. Due to the strong atomic bonds, SiC will not melt at its original composition, even at high temperatures.  Even at a temperature of more than 2,800°C, at 100 atm, SiC remains in a phase in which a Si melt containing approximately 19%C coexists with solid graphite. Unlike Si, a direct crystal growth method from the melt is not possible with SiC. This poses significant difficulties in growing the large-diameter single crystals required for device production. For these reasons, single crystals are now mainly grown by the sublimation method (modified Lely method). SiC sublimes at approximately 2,500°C and grows on a single crystal seed placed in an environment of approximately 2,200°C. The sublimation rate determines crystal growth rate. Since this process involves extremely high temperatures, it entails various problems, including impurities migrated into the substrate crystal and crystal defects caused by thermal stress. In addition, SiC has many polytypes with different atomic layer stacking. It is important to control proper crystal polytype growth and avoid twinning. Recent improvements in crystal growth methods have solved many of these problems. In particular, the occurrences of micropipes, crystal defects that can fatally damage device performance, have been reduced to near zero. Current methods are capable of producing 6-inch large-diameter wafers. However, crystal growth process at such high temperatures is difficult and expensive. In addition, growth crystals still contain numerous defects, including dislocations.  Further technological advances are required, including investigations of other methods such as solution growth and gas phase growth.

Since the crystal growth is a high temperature process, it is difficult to control the impurity concentrations during bulk single crystal growth, which is essential for semiconductor device fabrication. The most important progress was achieved by introducing a step-flow epitaxy, which is homoepitaxial growth using the CVD method. The step-flow mechanism that induces crystal growth along the steps on the atomic surface using a hexagonal SiC crystal wafer 4° to 8° off-cut relative to the c plane. This method can produce epitaxial layers with satisfactory crystallinity even at 1,500°C, which is much lower than the growth temperature of the single crystal. This method also allows precise control of both p and n conductivity that are the key for the device performance. It is now possible to acquire commercial SiC devices according to these improvements.
 

 

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